In a semiconductor device fabrication, back-end-of-line (BEOL) wafer processing generally involves forming interlevel dielectric (ILD) layers which include interconnects and via contacts. The interconnects and via contacts in the (ILD) layers interconnect the various components of the device as desired. Reactive ion etch (RIE) is employed to form trenches and vias to form the interconnects and via contacts.
However, plasma charges from the RIE collect in floating wells in the substrate of the device. The BEOL processing includes a clean process using a diluted hydrofluoric acid (DHF) solvent. For example, a DHF solvent is used to clean post etch residues. The DHF solvent along with the plasma charges collected in the floating well cause copper ion (Cu2+) migration, resulting in voids in the interconnects. For example, voids may form in an interconnect causing an open or high resistance connection with a via contact above.
From the foregoing discussion, there is a need to discharge plasma charges collected in floating wells of a device to improve reliability.